Frequency synthesizers generally fall into two groups: indirect and direct. The indirect synthesizer is characterized by good spurious suppression but relatively slow switching speed. Direct synthesis techniques usually yield rapid frequency switching but poorer spurious rejection.
One of the phase accumulators of prior art consists of a register whose contents are incremented by a fixed amount every clock cycle. Thus the register contents increase continuously until it overflows and the process is repeated. The rate of this repetition is proportional to the product of the clock frequency and the amount the register is incremented each clock cycle. The output of the register is fed to a sine look-up table to generate a digital sine wave which is then converted to analog by a D/A converter.
Generally, the accumulator in this type synthesizer is wider, or has more bits, than the sine look-up table and D/A converter. When this is true it can be shown that the worst case spurious frequency will be 6 db below the carrier for every bit in the sine look-up table address. Thus for a 10-bit wide address the worst case spurious will be 60 db down. (Note that in this case the D/A converter needs only nine bits of resolution).
The phase accumulator just described is an excellent low frequency synthesizer producing a good sine wave right down to D.C. It has the disadvantage that the D/A must be sampled every clock period thus limiting the maximum frequency that can be generated to a fourth or so of the maximum frequency at which D/A can be sampled. This problem is compounded as more and more bits are added to the D/A to reduce spurs since each additional bit generally means that the D/A takes longer to settle.
The method and apparatus disclosed here, called a feed-forward phase corrector takes some of the load off of the D/A converter thus allowing the output frequency to be pushed upward until limited by the logic speed. Also spurious rejection is obtained without increasing the D/A resolution.